Central computing electronic and electrical architecture solutions

In the era of intelligent and software-defined cars, whoever can dominate the EE architecture and software can occupy the commanding heights of the smart car market. Therefore, domestic mainstream vehicle companies are also actively making relevant layouts, and mass-produced models with "quasi-centralized" architecture solutions will be launched around 2022-2023.

However, the centralized architecture planned by various OEMs is not very unified in form. For example, SAIC Zero Beam's vehicle computing platform uses two HPC high-performance computing units; GAC or Great Wall's solutions use three major computing platforms: a central computing platform, an intelligent driving domain, and an intelligent cockpit domain. But generally speaking, the R&D and design concepts are similar: the hardware adopts the central computing + regional control architecture solution, and the software adopts the SOA software architecture design concept.

GAC Aian-Xingling Architecture

1) Hardware platform: The Protoss architecture consists of a digital mirror cloud, 3 core unit modules and 4 regional controllers (left/right/front/rear). Among them, the three core computer modules include the central computing unit, the intelligent driving domain control module and the cockpit domain control module; the central computing unit covers the new energy control module and the body control module, which is responsible for controlling functions such as vehicle driving, braking and vehicle equipment.

The central computing unit is equipped with the NXP S32G399 gateway computing chip, which is composed of 8 A cores + 4 M cores, and has a built-in LLCE+PFE acceleration engine with a communication delay of ≤20μs;

The cockpit domain control module is equipped with Qualcomm 8155/8295 chip, 7nm process, has 105K DMIPS computing power, and supports 3D character rendering, face recognition, AR-HUD and other functions;

The intelligent driving domain control module is equipped with Huawei's Ascend 610 high-performance chip, 7nm process, and supports computing power expansion of 200~400TOPS. The ISP's image processing capability can reach 2.4GPix/s, which can cope with complex road conditions such as highways and cities.

2) Software platform: adopting layered design SOA software architecture

The basic middle layer uses atomic service encapsulation and standardized interfaces;

The dedicated middle tier uses enhanced composition services and can be executed independently;

The APP software layer is an independent component decoupled from the bottom layer and can directly call services.

This software architecture realizes component service, atomization and standardization, decouples software and hardware, improves OTA capabilities and speed, and realizes hardware plug-and-play - new scenarios can be realized by adding new application modules.

Great Wall Motors - GEEP4.0 architecture

1) Hardware platform: The GEEP4.0 architecture consists of a central computing platform (CCU), an intelligent cockpit module (HUT), an intelligent driving module (ICU), and three regional controllers (VIU_L, VIU_R and VIU_F).

The main responsibility of the central computing unit CCU is to centrally process the functions of various domains such as auxiliary autonomous driving, power, chassis, body, air conditioning, body status, and mode management. In high-end autonomous driving configurations, the CCU can be used as an L3 domain control Backup of the server to achieve the lowest risk conditions.

3 area controllers: It is a standardized control unit that is divided, deployed and developed according to the body domain. It is arranged on the left, right and front respectively. It is responsible for integrating some surrounding MCUs, that is, ECU, power supply, controller , Input/output is integrated. At present, most of the software algorithms of the three VIUs have been moved to the CCU and are developed by the Great Wall Software Team. The VIU only retains a small part of the logic and is more responsible for driving I/O.

GEEP4.0 hardware platform

2) Software platform aspect

At the application software level, big data, cloud diagnosis, information security and other software systems are integrated to achieve functional integration;

Deploy software in different domains on different cores - the MCU core uses CP Autosar, and the electronic control software of different domains is deployed on multiple MCU cores; the HPC core uses Linux OS and AP Autosar middleware;

By deploying software from different domains on different cores, the integration between multiple domains is opened up horizontally, and the underlying hardware, operating system (CP autosar, Linux OS), middleware (AP autosar), protocol stack and applications are opened up vertically. Communication between software;

Support FOTA, and it is planned that some comfort functions will support SOA.

GEEP4.0 software platform

Xpeng X-EEA3.0

In November 2021, Xpeng Motors released the Xpeng G9 at the Guangzhou Auto Show, scheduled to be launched in 2022; the car uses Xpeng's new X-EEA 3.0 architecture. At present, Xpeng official website has not disclosed too many specific technical details. The author has compiled the following information for your reference:

Hardware architecture: central supercomputing + regional control;

The software platform architecture is divided into three layers: system software platform, basic software platform and intelligent application platform;

Communication architecture: using Gigabit Ethernet communication;

Data architecture: realize non-inductive OTA - domain controllers all partition and isolate the memory, one area is used for upgrades, and one area is used for normal operation of the vehicle; therefore, even when the vehicle is driving normally, OTA of new functions can still be performed at the same time upgrade;

Power architecture: The power supply of electrical equipment is controllable, and intelligent and precise power distribution is carried out according to user scenarios to reduce unnecessary power waste and optimize the use of power.

NIO - next-generation EE architecture

NIO's next-generation model selection is a regional controller architecture. The entire system consists of a central computing unit, four regional controllers and high-speed Ethernet to build a basic skeleton. Through the collaboration of the three, it builds an adaptive and self-learning system and provides a wide range of intelligent interconnection functions. Ring topology, supports Fail-operational dual redundancy system, and has good scalability.

Among them, the central computing unit has a computing power of more than 1000TOPS and a main frequency of more than 1GHz. Based on previous NVIDIA official website information, the central computing unit is controlled by NVIDIA's Orin chip, which is an iteration of the existing Adam supercomputing platform.

The Adam supercomputing platform can drive various intelligent functions and leave enough margin for adding new functions through OTA in the future.

For the regional controller, it is an automotive cerebellum system that supports a central computing platform. Its functions are:

1. Distributed edge computing framework;

2. Vehicle control arbitration center;

3. Information communication network oriented to service communication;

4. Regional centralized data center;

5. Vehicle power distribution hub;

6. Obtain data from smart sensors and control the behavior of smart actuators;

In order to realize the above functions, as well as the above-mentioned platformization, high cohesion and low coupling, high reusability, and flexible deployment characteristics, the software must be a service-oriented architecture and widely adopt middleware (SOME/IP, DDS, etc. ).

This requires the reconstruction of the existing software architecture. First, the remote calling method (RPC) is introduced, which is also the core of SOA thinking. Second, the traditional and commonly used local calling method (LPC) needs to be reconstructed (this kind of The method is local calling of functions, there is no unified mechanism and standard), for example, unifying the interface between RPC and LPC, allowing LPC to simulate communication methods such as Method, Request/Responce, Fire/Forget, Event, etc., to achieve insensible calls of services to the lower layer.

In addition, due to the limited resources of the regional controller, in order to achieve cross-domain functional integration and cross-domain functional isolation. NIO's approach is to use the AMP multi-core architecture on the regional controller. The AMP mode RTOS runs an operating system instance on each CPU, and these operating instances are not necessarily exactly the same.

This method has the characteristics of not requiring an MMU, low operating overhead, and supporting the integration of systems with different functional security levels. However, it also brings some challenges, such as the lack of unified management of the core load, the overhead of multi-core communication mechanisms, and the startup between different cores. Timing is difficult to manage, etc. This kind of engineering and technical problem will definitely be solved with the accumulation of experience and time. Moreover, Weilai has accumulated experience in self-developed domain control.