Challenges and Solutions for Automotive Electronic SoC Chip Interface IP

In the past 15 years, electronic devices in our lives have undergone a transformation from simple functionality to complex applications, relying on the latest foundational technologies such as 5G, artificial intelligence, high bandwidth, core networks, and more. Smart devices can now handle complex scenarios and functions at any time.

Smart vehicles, on the other hand, represent a new generation of automobiles equipped with advanced sensing systems, decision-making systems, and execution systems. They incorporate new technologies such as information communication, the Internet, big data, cloud computing, artificial intelligence, and more. These vehicles have partial or full autonomous driving capabilities and are transitioning from being purely modes of transportation to becoming intelligent mobile spaces.

According to a research report from the China Association of Automobile Manufacturers (Figure 1), after experiencing negative growth in car sales in 2019 and 2020, China's total car sales in 2021 reached 26.1 million units, showing a year-on-year growth of 3.1%. With a continuous growth trend in the coming years, it is expected that China's car market sales will reach around 30 million units by 2025. Due to the high average price of cars, this will be a substantial existing market.

The electrification and intelligence of automobiles are driving strong demand for automotive chips, as shown in Figure 2. In 2020, the penetration rate of intelligent and connected functions in new vehicles in China reached 48.8%. It is projected that by 2025, the penetration rate of these features in new vehicles could reach 75.9%, achieving true widespread adoption.

At the same time, electrification in the automotive industry has also provided new growth opportunities for semiconductor chips. According to traditional calculations of semiconductor value per vehicle, a conventional internal combustion engine (ICE) car has an average semiconductor value of $417. Hybrid vehicles, such as 48V/mild hybrids, have increased the semiconductor value per vehicle by $114 compared to traditional ICE vehicles. Full hybrids/plug-in hybrids have increased the semiconductor value by $368, and pure electric vehicles have increased it by $358. It is estimated that Tesla's incremental semiconductor value per vehicle is around $400.

Smart vehicles introduce various new functions such as vehicle control, power safety, autonomous driving, and smart cabins, all of which require a large number of chips to provide support. Looking at the levels of autonomous driving, L1/L2 chips have an estimated value of about $100-150 per vehicle, while L3 can reach $600, and L4/L5 can reach $900 or even $1,200. Therefore, automotive electronic chips, especially autonomous driving chips, have become the main battleground for domestic manufacturers.

In addition to this, smart cabins are also a significant growth market for automotive intelligence. According to ICVtank's predictions, by 2026, the global autonomous driving market is expected to reach $68.7 billion, with a CAGR of 25.4%. The smart cabin market is projected to reach $44 billion, with a CAGR of approximately 11.3%. The Chinese market is expected to have a compound annual growth rate of 11.6%, leading global growth. The smart automotive sector offers many sub-markets and new opportunities, including displays, heads-up displays, intelligent surround view systems, domain controllers, and autonomous driving. Domestic automakers and component suppliers are poised for significant growth, but they also face competition from traditional automotive chip manufacturers and emerging consumer chip giants. Xinshu YAO's advantage lies in its local presence, deep understanding of the market and application requirements, and collaboration with domestic OEMs, allowing it to have a significant edge in terms of cost and performance.

Intelligence promotes SoC-based automotive electronic chips

Automotive architecture has experienced development from distributed to domain centralized, and will then evolve to centralized computing. The general trend is that the number of ECUs is constantly decreasing, control and computing are becoming centralized, and local and cloud collaboration will be realized in the future. change. Every vehicle is a mobile data terminal, performing local and remote collaborative computing and control at all times, realizing real-time communication between vehicles and between vehicles and various infrastructures. These trends are promoting Automotive chip design is SoC-based.

Taking smart cockpits as an example, foreign manufacturers such as Qualcomm, Samsung, and Intel, and domestic manufacturers such as Horizon and Corechi are vying to launch new products, and the computing power of CPUs and GPUs continues to increase. Taking the 7nm process chip of Qualcomm 8155 as an example, adding NPU, the computing power can reach 4TOPS; car manufacturers are also gradually introducing the 5nm process chip of Qualcomm 8295. The most obvious performance improvement is still the NPU. The enhancement of the NPU has greatly improved the intelligence. ization and user experience, this is one of the main development directions of smart cockpits.

In autonomous driving, computing power is king. Non-traditional automotive chip manufacturers represented by NVIDIA are vigorously releasing new products and quickly occupying the market, and Qualcomm is also sparing no effort. As shown in the computing power rankings in Figure 3, Qualcomm’s hybrid solution ranks first, and Nvidia takes the second to sixth positions. In addition to the computing power and performance of deep learning, autonomous driving chips also require support for a variety of sensors. Input, ease of software development, obtaining functional safety certification and providing complete and open solutions, it can be seen that automotive electronic chip and system design is not an easy task.

Challenges and solutions for automotive electronic SOC chip interface IP

Taking complex autonomous driving chips as an example, we will make a multi-dimensional comparison of mainstream ADAS chips. At present, the computing power of a single chip reaches more than 200TOPS, and the energy efficiency ratio is also more than 3. It is generally made of processes below 16nm, and can reach up to 5nm. The interface IP is the most complex part, including LPDDR, PCIe, Ethernet, MIPI, display interface HDMI and universal USB interfaces. The configuration of these interface IPs is very close to that of mainstream mobile phones, but the specifications are a generation later. This is due to more mature technology, higher reliability and more stable supply. This also confirms that the development cycle of automotive-grade SoC is much longer than that of consumer-grade products. Considering the complex testing process before launch, ordinary consumers will experience it even later.

Figure 5 shows the evolution and development trend of the automotive electronics core bus interface. The Society of Automotive Engineers (SAE) divides automotive networks into several different levels according to the performance of the vehicle network system. These buses are suitable for different components and applications of the car. As the car develops, the technology of these buses has reached bottlenecks. Some mature consumer electronics technologies have been gradually transplanted into cars, such as the rise of in-vehicle Ethernet; combined with a series of TSN (Time Sensitive Network) standards proposed by IEEE, TSN uses precise time on the basis of traditional Ethernet networks. Synchronization limits transmission delays by ensuring bandwidth and provides high-level service quality to support various audio and video-based media applications. In-vehicle Ethernet is expected to reach a high bandwidth of 25Gbps in 2025. Multimedia interfaces have also been introduced in the car, such as LVDS MIPI, HDMI, DP, and A-PHY currently being promoted by the MIPI organization, as well as expandable interfaces such as: PCIe, USB etc. In short, the bandwidth is getting higher and higher, the functions are getting more complex, iteration is getting faster and faster, and the requirements for buses and interfaces are diversifying.

Automotive electronics requires automotive-grade technology and also requires automotive-grade IP. However, automotive-grade IP and consumer electronics IP are very different.

The first is the difference in reliability. Depending on the grade of vehicle regulations, the environmental temperature tolerances vary greatly, and the differences in service life and failure rate are also obvious. The AEC organization has many different standards applicable to chip IP. The ACE-Q100 vehicle regulatory verification standard is widely used in the industry. In addition, the design service life of automotive electronics is at least 10 years, and generally more than 15 years. The failure rate during the service life is basically 1 ppm, which is less than one part per million.

Compared with consumer IP, the reliability requirements of automotive IP require a large amount of additional complex work. The main differences are in operating temperature, durability and reliability, see Figure 6 for details. Different Tier 1 manufacturers have different definitions of Mission Profile, and IP manufacturers also have their own unique insights. Xin Yaohui will cooperate with customers and foundries to jointly define a realistic Mission Profile, and conduct rigorous simulation verification based on the vehicle-specification process and vehicle-specification-related design data, which also indirectly extends the development cycle of vehicle-specification chips.

 Functional safety is also crucial for automotive-grade chips (Figure 7), especially for components and modules related to personal safety. The International Organization for Standardization has defined the ISO 26262 standard to regulate different safety levels. Starting from QM, each level of SPFM and LFM is gradually improved, resulting in a lower random hardware failure rate. Looking at the IP requirements from this perspective, reliability AEC-Q100 requires a lot of extra work and process intervention. The advantage of IP reuse is that it can hide the huge tedious process and time overhead. End users can obtain safety packages from IP suppliers, including DFMEA, FMEDA, Safety Manual, certification certificates, etc., which can greatly speed up the development process of automotive-grade chips.

In order to improve functional safety, two strategies are generally adopted, one is protective design, and the other is redundant design. There are various protective methods, which are complicated to implement, but they are highly targeted and efficient, such as ECC error correction suitable for on-chip storage, memory BIST optimization, packet CRC error detection, Watchdog anti-lock, and execution unit lockstep etc. The redundant design method is relatively simple and widely applicable, but the cost is high. The industry usually uses a combination of the two methods to draw on the strengths of each.

In summary, the automotive grade SoC design challenges include the following aspects, quality controllable and traceable quality management system QMS, reliability design AEC-Q100 required by industry standards, functional safety design ISO 26262, and various aspects of the process. The review report, signed deliverables, and evaluation report or certification certificate from a third-party authoritative organization.

In response to the stringent PPA requirements, stability, reliability, interoperability, and protocol compatibility requirements, we have adopted the industry's most mature verification methodology and IP architecture, focusing on IP quality and complete solutions, relying on a complete design and verification platform , professional technical support team.

For automotive grade design requirements, industry standards such as: AEC-Q100, ISO26262, IATF 16949, we provide design and verification that meet automotive grade operating temperature, durability, and reliability requirements, as well as protection and redundant design that meet automotive grade standards. The plan and design process comply with strict quality management requirements.

For user integration and implementation challenges, such as: subsystem integration, high-speed interface system-level SI/PI design, third-party automotive regulatory review and evaluation, we can provide automotive regulatory IP subsystem integration, automotive regulatory SoC system design, performance analysis and Chip debugging to meet the requirements of vehicle regulatory testing.

Automotive grade interface IP is an important cornerstone of automotive electronic SoC design. The complete automotive-grade interface IP solution empowers the development of domestic independent automotive-grade SoC chips and promotes the independent controllability of China's automotive electronics industry. In addition to the automotive electronics field, Xinyaohui can provide one-stop interface IP solutions in data centers, high-performance computing, 5G, Internet of Things, artificial intelligence, consumer electronics and other fields, empowering domestic SoCs in various application fields. The wave of change.