TDA3MVDBABFRQ1

One of the standout features of the TDA3x SoC is its Vision AccelerationPac, which offloads vision analytics tasks from the main application processor, resulting in improved performance and reduced power consumption. This specialized engine is equipped with a 32-bit RISC core and a vector coprocessor, making it ideal for efficient and specialized vision processing. Additionally, Texas Instruments provides a robust set of development tools for programming and debugging, ensuring that developers can harness the full potential of the TDA3x SoC for their ADAS applications

Key Features

• Architecture designed for ADAS applications
• Video and image processing support
  • Full-HD video (1920 × 1080p, 60 fps)
  • Video input and video output
• Up to 2 C66x floating-point VLIW DSP
  • Fully object-code compatible with C67x and C64x+
  • Up to thirty-two 16 × 16-bit fixed-point multiplies per cycle
• Up to 512kB of on-chip L3 RAM
• Level 3 (L3) and Level 4 (L4) interconnects
• Memory Interface (EMIF) module
  • Supports DDR3/DDR3L up to DDR-1066
  • Supports DDR2 up to DDR-800
  • Supports LPDDR2 up to DDR-667
  • Up to 2GB supported
• Dual Arm^® Cortex^®-M4 Image Processor Unit (IPU)
• Vision accelerationPac
  • Embedded Vision Engine (EVE)
• Display subsystem
  • Display controller with DMA engine
  • CVIDEO / SD-DAC TV analog composite output
• Video Input Port (VIP) module
  • Support for up to 4 multiplexed input ports
• On-chip temperature sensor that is capable of generating temperature alerts
• General-Purpose Memory Controller (GPMC)
• Enhanced Direct Memory Access (EDMA) controller
• 3-port (2 external) Gigabit Ethernet (GMAC) switch
• Controller Area Network (DCAN) module
  • CAN 2.0B protocol
• Modular Controller Area Network (MCAN) module
  • CAN 2.0B protocol
• Eight 32-bit general-purpose timers
• Three configurable UART modules
• Four Multichannel Serial Peripheral Interfaces (McSPI)
• Quad SPI interface
• Two Inter-Integrated Circuit (I²C™) ports
• Three Multichannel Audio Serial Port (McASP) modules
• Secure Digital Input Output Interface (SDIO)
• Up to 126 General-Purpose I/O (GPIO) pins
• Power, reset, and clock management
• On-chip debug with CTools technology
• Automotive AEC-Q100 qualified
• 15 × 15 mm, 0.65-mm pitch, 367-pin PBGA (ABF)
• Seven Dual Clock Comparators (DCC)
• Memory Cyclic Redundancy Check (CRC)
• TESOC (LBIST/PBIST) that enables field testing of logic and on-chip memory
• Error Signaling Module (ESM)
• Five instances of Real-Time Interrupt (RTI) modules that can be used as watch dog timers
• 8-channel 10-bit ADC
• MIPI^® Camera Serial Interface 2 (CSI-2)
• PWMSS
• Full HW image pipe: DPC, CFA, 3D-NF, RGB-YUV
  • WDR, HW LDC and perspective