KSZ8794CNXCC

The KSZ8794CNX is a highly integrated, Layer 2 managed, four-port switch with numerous features designed to reduce system cost. It is intended for cost-sensitive applications requiring three 10/100Mbps copper ports and one 10/100/1000Mbps Gigabit uplink port.

The KSZ8794CNX incorporates a small package outline, low power consumption with internal biasing, and on-chip termination. Its extensive features set includes enhanced power management, programmable rate limiting and priority ratio, tagged and port-based VLAN, port-based security and ACL rule-based packet filtering technology, QoS priority with four queues, management interfaces, enhanced MIB counters, high-performance memory bandwidth, and a shared memory-based switch fabric with non-blocking support.

The KSZ8794CNX provides support for multiple CPU data interfaces to effectively address both current and emerging fast Ethernet and Gigabit Ethernet applications where the GMAC interface can be configured to any of RGMII, MII and RMII modes.The KSZ8794CNX is built on Microchip's latest industry-leading Ethernet analog and digital technology, with features designed to offload host processing and streamline your overall design:

- Three integrated 10/100Base-T/TX MAC/PHYs
- One integrated 10/100/1000Base-T/TX GMAC with selectable RGMII, MII or RMII interfaces
- Small 64-pin QFN package

A robust assortment of power management features including Energy Efficient Ethernet (EEE), PME and WoL have been designed in to satisfy energy efficient environments.All registers in the MAC and PHY units can be managed through the SPI interface. MIIM PHY registers can be accessed through the MDC/MDIO interface.

Microchip's complimentary and confidential LANCheck® online design review service is available for customers who have selected our products for their application design-in. The LANCheck online design review service is subject to Microchip's Program Terms and Conditions and requires a myMicrochip account.

Key Features

• New generation switch with three MACs, one GMAC (for uplink) and three PHYs that are fully compliant with the IEEE 802.3u standard
• 10/100Base-T/TX switch system which combines a switch engine, frame buffer management, address lookup table, queue management, MIB counters, MAC, and PHY transceivers
• Rapid spanning tree support (RSTP) for topology management
• Microchip''s LinkMD® cable diagnostic capabilities for determining cable opens, shorts, and length
• IEEE 802.1q VLAN support for up to 128 active VLAN groups (full range 4096 of VLAN IDs)
• Support 802.1x port-based security and MAC-based authentication via access control lists (ACL)
• 802.1p, DiffServ-based and Re-mapping of 802.1p priority field, per-port basis on four priority levels
• 4 priority queues with dynamic mapping for IEEE 802.1P, IPV4 ToS (DiffServ), IPV6 Traffic Class, etc
• Programmable rate limiting at the ingress and egress ports on a per port basis
• High-speed SPI (4-wire, up to 50MHz) interface to access all internal registers
• MII management (MIIM, MDC/MDIO 2 wire) interface to access all PHY registers per IEEE 802.3 specification
• Control registers configurable on-the-fly
• Port mirroring/monitoring/sniffing: ingress and/or egress traffic to any port or MII/RMII
• MIB counters for fully-compliant statistics gathering (36 MIB counters per port)
• Full-chip software power-down
• Energy detect power-down (EDPD)
• Support IEEE P802.3az Energy Efficient Ethernet (EEE)
• Wake on LAN (WoL) support